Keyword: FPGA
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THP089 Design of LLRF System for RAON LLRF, controls, feedback, target 1135
 
  • H. Do, O.R. Choi, J. Han, J.-W. Kim
    IBS, Daejeon, Republic of Korea
  • C.K. Hwang
    KAERI, Daejon, Republic of Korea
 
  The low-level RF (LLRF) system being designed for RAON will allow research in the rare isotope beam facility. The LLRF system is used to feed the superconducting quarter-wave resonator having the frequency of 81.25 MHz with controlled the amplitude and phase of RF. The LLRF system uses a field programmable gate array (FPGA) to provide controlled RF amplitude and phase with ±1° and less than ±1% of stabilities, respectively. The resolution and working range is 0.004 dB and 20 dB in amplitude, respectively, and 0.5° and 360° in phase. For the RF performance test, a prototype of LLRF system is designed and fabricated. This paper will describe the design detail. Also, testing results of the prototype of LLRF system are presented.  
 
THP090 Compact Interlock System for Supratech High Power RF teststand klystron, focusing, PLC, diagnostics 1138
 
  • A. Hamdi, M. Desmons, M. Luong, J. Novo
    CEA/DSM/IRFU, France
  • F. Ballester
    CEA, Gif-sur-Yvette, France
 
  Supratech is a facility at CEA/Saclay that enables tests on superconducting and high power RF components for particle accelerators. The facility comprises a home-made hard tube HV modulator powering up to 95kV-20A at 2.1ms/50Hz and a 700MHz pulsed klystron developed by CPI able to produce RF up to 1MW-2ms/50Hz. A new compact HV and RF interlock system including klystron HV diagnostics has been implemented on Supratech test facility. This paper describes in more detail the klystron interlock system and the results of the first tests.