| Paper | Title | Page |
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| WECOAA01 | Tango Collaboration News | 16 |
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| During the last years, the Tango collaboration was and is still growing. More and more users are requesting new features and developing new tools for Tango. Decisions whether the requested features will be implemented and whether new tools will be part of the Tango distribution need to be made. The organizational aspects of the collaboration need to be clarified as well as the decision making process for new developments. This paper will explain the collaboration, its organization and the decision making process as well as the latest facts and features around Tango. Some ongoing developments are the new code generation tool to allow inheritance in the Tango class structure, the new event system for high bandwidth event distribution and the Tango packaging to allow installation with a few clicks. | ||
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| WECOAA02 | The TINE Control System Protocol: How to Achieve High Scalability and Performance | 19 |
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Over the years TINE* has implemented numerous strategies for achieving high efficiency regarding data transport within a distributed control system. This was in fact essential in controlling a large machine such as HERA**. In modern times, a control system protocol suite must offer interfaces to many and sundry development platforms (not simply C++ and java) and it must support 'part-time' application developers, who might not be so well-versed in writing 'efficient' applications. This is an important point and easy to overlook until it is noticed that front end servers are struggling due to poor data flow models. For instance, a magnet server with 200 PSCs (Power Supply Controllers) might be accessed by a simple panel application which synchronously polls the readback values of all PSCs individually. The same server will have a much easier time if the client can be 'coerced' into acquiring the information asynchronously and as a multi-channel array of all values. TINE now offers various 'second-order' protocol features which go a long way in not just allowing but 'enforcing' efficient data transfer. We shall describe some of these features in this article.
* http://tine.desy.de |
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| WECOAA03 | FESA3 – The New Front-End Software Framework at CERN and the FAIR Facility | 22 |
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Currently the LHC* is controlled by the use of FESA** 2.11 classes. FESA3 is not only an update of FESA2.11, but a completely new approach. GSI plans to use the FESA system at the complex FAIR facility. One of the main reasons to introduce FESA3 was to provide a framework which can be shared between different labs. This is accomplished by splitting up the FWK into a common part, which is used by all labs, and a lab-specific part, which allows e.g. a lab dependent implementation of the timing-system. FESA3 is written in C++, runs a narrow interface (RDA***), supports multiplexing of different accelerator-cycles, is completely event driven and uses thread priorities for scheduling. It provides all FESA2.11 functionalities and additionally introduces several new features. FESA3 is integrated in the Eclipse IDE as a plugin. Using this plugin, the user can easily create his FESA-class design (xml file), generate the C++ source code, fill the device-specific methods, and deploy the binary on a front end. As well as the framework the Eclipse plugin has a lab specific implementation. An operational release for FESA3 is planned end of 2010.
* LHC = The (L)arge (H)adron (C)ollider, located at CERN/Switzerland |
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| WECOAA04 | Employing RTEMS and FPGAs for Beamline Applications at the APS | 27 |
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| At the Advanced Photon Source (APS), the power and flexibility of an Altera Cyclone-II FPGA combined with the Arcturus uC5282 embedded microprocessor running RTEMS, provides a low cost solution for implementing beamline applications. In this paper, we discuss the approach of coupling an Altera FPGA and the Arcturus uC5282 to implement a time-resolved 32-channel scaler, development using the Altera Quartus-II design environment and the RTEMS tools, as well as an ASYN based EPICS device driver and its integration to the standard scaler record support. Furthermore, we discuss how this approach has been applied to other control system applications, such as for photon counting and flexible CCD shutter timing control. By employing this approach, a variety of applications can be quickly developed on one hardware platform which realizes real-time performance within the FPGA and provide a cost effective EPICS IOC for exporting data to scientists and users. | ||
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