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URLhttps://doi.org/10.18429/JACoW-ICALEPCS2025-WEMG009
TitleModernizing FPGA development using the DESY FPGA firmware framework
Authors
  • D. Vassallo, A. Singh, J. Jamilkowski, K. Mernick, K. Fahey, K. Kulmatycski, M. Costanzo
    Brookhaven National Laboratory
AbstractBrookhaven National Laboratory (BNL) is currently developing new hardware description language (HDL) code and embedded software for the Electron-Ion Collider (EIC) control system. Part of this effort is modernizing the development process itself, leveraging methodologies and tools that were initially targeted at the software world. These methods include effective source control and project management, modularization and rapid deployment of updated code, automated testing, and in many cases automated code generation. HDL designers additionally face unique challenges compared to software designers, particularly with vendor locking and dependency on particular tools and IP. The FPGA Firmware Framework (FWK), developed by DESY, is a set of tools that helps to both apply these modern methods and to overcome some of those unique challenges. This paper will cover the workflow, successes, and challenges faced when using the FWK. In particular, we will focus on the experience using this workflow to develop a customizable delay generator IP targeting a Zynq FPGA.
Paperdownload: WEMG009.pdf
CiteBibTeX, LaTeX, Text/Word, RIS, EndNote
Conference20th Int. Conf. Accel. Large Exp. Phys. Control Syst. (ICALEPCS'25)
Series
LocationChicago, IL, USA
Date20-26 Sep 2025
PublisherJACoW Publishing, Geneva, Switzerland
Editorial BoardKent Wootton (ANL), Jeffery Biss (FNAL), Gustavo Bruno (ANL), Jeff Kirchman (ANL), Kelly Jaje (ANL), Denise Skiadopoulos (ANL), SuYin Grass Wang (ANL)
Online ISBN978-3-95450-255-4
Online ISSN2226-0358
Received06 September 2025
Revised26 September 2025
Accepted23 October 2025
Issued25 November 2025
DOI10.18429/JACoW-ICALEPCS2025-WEMG009
Pages943-947