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URLhttps://doi.org/10.18429/JACoW-ICALEPCS2025-TUPD033
TitleUpgrading hardware and software for the LANSCE PSR ExBPM with FPGA based high speed digitizers
Authors
  • T. Ramakrishnan, A. Braido, H. Watkins, S. Baily
    Los Alamos National Laboratory
  • L. Graham
    Emerson (United States)
AbstractThis paper presents the current approach to upgrade the readout instrumentation for the Proton Storage Ring (PSR) Extraction Line Beam Position Monitor System (ExBPMs) that are located between PSR and Lujan center Target at the Los Alamos Neutron Science center (LANSCE) accelerator. National Instrument’s PXIe platform with high-speed digitizers have been chosen as the hardware which will replace the original CAMAC/NIM/VME system which is obsolete. The beam position algorithm for this project has been demonstrated with the slower real-time Labview software using NI-Scope. The software is currently being written and tested using Labview FPGA to make the position processing algorithm match the acquisition speed. The beam position algorithm is designed to handle larger data streams so that it can also be used on the LANSCE Linac BPMs. FPGA design of the algorithm is inherently complex and requires multiple interacting factors such as the LinuxRT OS and supporting packages deployed on the PXIe. (LA-UR-25-23748)
Paperdownload: TUPD033.pdf
CiteBibTeX, LaTeX, Text/Word, RIS, EndNote
Conference20th Int. Conf. Accel. Large Exp. Phys. Control Syst. (ICALEPCS'25)
Series
LocationChicago, IL, USA
Date20-26 Sep 2025
PublisherJACoW Publishing, Geneva, Switzerland
Editorial BoardKent Wootton (ANL), Jeffery Biss (FNAL), Gustavo Bruno (ANL), Jeff Kirchman (ANL), Kelly Jaje (ANL), Denise Skiadopoulos (ANL), SuYin Grass Wang (ANL)
Online ISBN978-3-95450-255-4
Online ISSN2226-0358
Received10 September 2025
Revised16 September 2025
Accepted18 September 2025
Issued25 November 2025
DOI10.18429/JACoW-ICALEPCS2025-TUPD033
Pages597-601