<?xml version="1.0" encoding="UTF-8"?>
<xml>
  <records>
    <record>
       <contributors>
          <authors>
             <author>Carmichael, L.R.</author>
             <author>Austin, M.R.</author>
             <author>Harms, E.R.</author>
             <author>Neswold, R.</author>
             <author>Prosser, A.</author>
             <author>Warner, A.</author>
             <author>Wu, J.Y.</author>
          </authors>
       </contributors>
       <titles>
          <title>
             Software and Firmware-Logic Design for the PIP-II Machine Protection System Mode and Configuration Control at Fermilab
          </title>
       </titles>
       <publisher>JACoW Publishing</publisher>
       <pub-location>Geneva, Switzerland</pub-location>
		 <isbn>2226-0358</isbn>
		 <isbn>978-3-95450-238-7</isbn>
		 <electronic-resource-num>10.18429/JACoW-ICALEPCS2023-TUPDP111</electronic-resource-num>
		 <language>English</language>
		 <pages>832-835</pages>
       <keywords>
          <keyword>controls</keyword>
          <keyword>interface</keyword>
          <keyword>operation</keyword>
          <keyword>linac</keyword>
          <keyword>FPGA</keyword>
       </keywords>
       <work-type>Contribution to a conference proceedings</work-type>
       <dates>
          <year>2024</year>
          <pub-dates>
             <date>2024-02</date>
          </pub-dates>
       </dates>
       <urls>
          <related-urls>
              <url>https://doi.org/10.18429/JACoW-ICALEPCS2023-TUPDP111</url>
              <url>https://jacow.org/icalepcs2023/papers/tupdp111.pdf</url>
          </related-urls>
       </urls>
       <abstract>
          The PIP-II Machine Protection System (MPS) requires a dedicated set of tools for configuration control and management of the machine modes and beam modes of the accelerator. The protection system reacts to signals from various elements of the machine according to rules established in a setup database filtered by the program Mode Controller. This is achieved in accordance with commands from the operator and governed by the firmware logic of the MPS. This paper describes the firmware logic, architecture, and implementation of the program mode controller in an EPICs based environment. 
       </abstract>
    </record>
  </records>
</xml>
