<?xml version="1.0" encoding="UTF-8"?>
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  <records>
    <record>
       <contributors>
          <authors>
             <author>Geraldes, R.R.</author>
             <author>Brito Neto, J.L.</author>
             <author>Coelho, E.P.</author>
             <author>Do Carmo, L.P.</author>
             <author>Horita, A.Y.</author>
             <author>Luiz, S.A.L.</author>
             <author>Moraes, M.A.L.</author>
          </authors>
       </contributors>
       <titles>
          <title>
             The FPGA-Based Control Architecture, EPICS Interface and Advanced Operational Modes of the High-Dynamic Double-Crystal Monochromator for Sirius/LNLS
          </title>
       </titles>
       <publisher>JACoW Publishing</publisher>
       <pub-location>Geneva, Switzerland</pub-location>
		 <isbn>2226-0358</isbn>
		 <isbn>978-3-95450-221-9</isbn>
		 <electronic-resource-num>10.18429/JACoW-ICALEPCS2021-TUPV004</electronic-resource-num>
		 <language>English</language>
		 <pages>370-375</pages>
       <keywords>
          <keyword>controls</keyword>
          <keyword>undulator</keyword>
          <keyword>FPGA</keyword>
          <keyword>EPICS</keyword>
          <keyword>operation</keyword>
       </keywords>
       <work-type>Contribution to a conference proceedings</work-type>
       <dates>
          <year>2022</year>
          <pub-dates>
             <date>2022-03</date>
          </pub-dates>
       </dates>
       <urls>
          <related-urls>
              <url>https://doi.org/10.18429/JACoW-ICALEPCS2021-TUPV004</url>
              <url>https://jacow.org/icalepcs2021/papers/tupv004.pdf</url>
          </related-urls>
       </urls>
       <abstract>
          The High-Dynamic Double-Crystal Monochromator (HD-DCM) has been developed since 2015 at Sirius/LNLS with an innovative high-bandwidth mechatronic architecture to reach the unprecedented target of 10 nrad RMS (1 Hz - 2.5 kHz) in crystals parallelism also during energy fly-scans. After the initial work in Speedgoat’s xPC rapid prototyping platform, for beamline operation the instrument controller was deployed to NI’s CompactRIO (cRIO), as a rugged platform combining FPGA and real-time capabilities. Customized libraries needed to be developed in LabVIEW and a heavily FPGA-based control architecture was required to finally reach a 20 kHz control loop rate. This work summarizes the final control architecture of the HD-DCM, highlighting the main hardware and software challenges; describes its integration with the EPICS control system and user interfaces; and discusses its integration with an undulator source.
       </abstract>
    </record>
  </records>
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