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| URL | https://doi.org/10.18429/JACoW-IBIC2024-TUP27 |
|---|---|
| Title | The development of new BPM signal processor at SSRF |
| Authors |
|
| Abstract | A BPM signal processor has been developed for SSRF since 2009. It composed of Virtex5 FPGA, ARM board, and 4 125MSPS sampling rate ADCs. Since then, electronic technology has made significant progress. Such as Zynq UltraScale+ MPSoC FPGA contains both hard-core ARM and high-performance FPGA, and ADCs with a sampling rate of 1GSPS have been applied in mass production. A new BPM processor with Zynq UltraScale+ MPSoC FPGA and 1GSPS ADCs is under development at SSRF. Due to the application of new technologies, the processor performance will be significantly improved. The new processor can also meet the needs of ultra-low emittance measurement for the new generation of light sources. This paper will introduce the design of the processor and the relative tests. |
| Paper | download: TUP27.pdf |
| Cite | BibTeX, LaTeX, Text/Word, RIS, EndNote |
| Conference | Proc. 13th International Beam Instrumentation Conference |
| Series | |
| Location | Beijing |
| Date | 09-13 Sep 2024 |
| Publisher | JACoW Publishing, Geneva, Switzerland |
| Editorial Board | Jianshe Cao (IHEP), Junhui Yue (IHEP), Lin Bian (IHEP), Ivan Andrian (Elettra-Sincrotrone Trieste S.C.p.A.), Volker RW Schaa (GSI), Zhichu Chen (SARI) |
| Online ISBN | 978-3-95450-249-3 |
| Online ISSN | 2673-5350 |
| Received | 05 September 2024 |
| Revised | 12 September 2024 |
| Accepted | 13 September 2024 |
| Issued | 11 December 2024 |
| DOI | 10.18429/JACoW-IBIC2024-TUP27 |
| Pages | 106-109 |
| Copyright | Published by JACoW Publishing under the terms of the Creative Commons Attribution 4.0 license. Any further distribution of this work must maintain attribution to the author(s), the published article's title, publisher, and DOI. |