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https://doi.org/10.18429/JACoW-IBIC2018-MOPC16
Title The Development and Applications of Digital BPM Signal Processor on SSRF
Authors
  • L.W. Lai, F.Z. Chenpresenter, Y.B. Leng, Y.B. Yan, N. Zhang, W.M. Zhou
    SSRF, Shanghai, People’s Republic of China
Abstract The development of Digital BPM Signal Processors (DBPM) for SSRF started from 2008. The first prototype for SSRF storage ring was completed in 2012, with turn-by-turn resolution better than 1μm. From 2016 to 2017, SSRF successively constructed two FEL facilities in China, DCLS and SXFEL test facilities. The second ver-sion DBPM was developed and used in large scale during this period to meet the requirements of signal processing for stripline BPMs and cavity BPMs. After that, we turned to the development of DBPM for SSRF storage ring based on the second version hardware, including FPGA firmware, EPICS IOC, EDM control panel. The development was completed and tests were carried out in early 2018. Test results showed that the position data is accurate and can monitor beam movement correctly, and online turn-by-turn position data resolution reaches 0.46μm. This paper will introduce the design of DBPM for the SSRF storage ring and the tests carried out to verify the data accuracy and evaluate the system performance.
Paper download MOPC16.PDF [1.285 MB / 3 pages]
Poster download MOPC16_POSTER.PDF [1.372 MB]
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Conference IBIC2018
Series International Beam Instrumentation Conference (7th)
Location Shanghai, China
Date 09-13 September 2018
Publisher JACoW Publishing, Geneva, Switzerland
Editorial Board Volker RW Schaa (GSI, Darmstadt, Germany)
Online ISBN 978-3-95450-201-1
Received 04 September 2018
Accepted 13 September 2018
Issue Date 29 January 2019
DOI doi:10.18429/JACoW-IBIC2018-MOPC16
Copyright
Creative Commons CC logoPublished by JACoW Publishing under the terms of the Creative Commons Attribution 3.0 International license. Any further distribution of this work must maintain attribution to the author(s), the published article's title, publisher, and DOI.