Tobiyama, M. Ikeda, H. JACoW Geneva, Switzerland 978-3-95450-192-2 10.18429/JACoW-IBIC2017-TUPCF09 English 221-224 TUPCF09 ion timing injection FPGA controls Contribution to a conference proceedings 2018 2018-03 https://doi.org/10.18429/JACoW-IBIC2017-TUPCF09 http://jacow.org/ibic2017/papers/tupcf09.pdf Turn-by-turn timing systems for SuperKEKB beam position monitors using Xilinx Zynq FPGA have been developed. The RF frequency divider with external synchronization circuit creates a fiducial signal synchronized to the accurate injection timing from the injector event system. As the Log-Ratio turn-by-turn monitors (Digitex 18k11) need clock timing deviation to the beam signal within 8 ns, the cable length from the BPM heads to the detectors have been adjusted with the maximum deviation less than 1 ns using TDR. The time delay to adjust each cable lengths and the BPM placements have been created by using 32-ch RF timing delay with the step of 2 ns. The start trigger to the 18k11 has been made by using the digital delay (SRS DG645) from the injection trigger. The measured performance of the frequency divider, the 32-ch RF timing delay and start trigger system will be shown.