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Kobayashi, K.

Paper Title Page
WEPC04 Transverse Feedback Development at SOLEIL 316
 
  • R. Nagaoka, L. Cassinari, J.-C. Denard, J.-M. Filhol, N. Hubert, M.-P. Level, P. Marchand, C. Mariette, F. Ribeiro, R. Sreedharan
    SOLEIL, Gif-sur-Yvette
  • K. Kobayashi, T. Nakamura
    JASRI/SPring-8, Hyogo-ken
 
  The SOLEIL ring is planned to operate in both multibunch and high current per bunch modes. However, the small vertical chamber aperture around the SOLEIL ring enhances the transverse impedance both in its resistive-wall and broadband content, resulting in instabilities that appear at relatively low current compared to the desired values. A decision was therefore taken to install a digital bunch-by-bunch feedback system, with an aim to make it operational from the beginning of the user operation. The system implemented comprises components developed elsewhere, particularly the FPGA processor of Spring-8, chosen among different possible solutions. Using a BPM and a stripline in the diagonal mode, a single unit of the FPGA processor board has shown to successfully suppress resistive-wall and ion induced instabilities in either one or both transverse planes up to 300 mA. The paper discusses the system characteristics including striplines whose shunt impedance was maximised by keeping the coupling impedance small*, the obtained performance as well as future extensions to overcome the encountered limitations.

* C. Mariette ID1209