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https://doi.org/10.18429/JACoW-IPAC2015-MOPTY022
Title Bunch by Bunch DBPM Processor Development and Preliminary Experiment in SSRF*
Authors
  • Y.B. Leng, Z.C. Chen, L.W. Lai, Y.B. Yan, Y. Yang
    SSRF, Shanghai, People's Republic of China
Abstract Digital BPM processor with turn-by-turn capability has been widely used in synchrotron radiation facilities over the world, which is proved to be very useful and powerful for daily operation and linear optics study but not good enough in the case of individual bunch information required. In order to sufficient individual bunch diagnostics requirements a development plan of the next generation DBPM processor with bunch-by-bunch capability has been initiated in SINAP since 2012. The whole development was divided into three steps: a concept processor based on digital oscilloscope IOC, an algorithm prototype processor based on commercial high speed ADC board, and a custom designed dedicated processor. The progress of this work and several preliminary beam experiments will be discussed in this paper.
Funding Work supported by Chinese NSFC11375255.
Paper download MOPTY022.PDF [1.008 MB / 3 pages]
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Conference IPAC2015, Richmond, VA, USA
Series International Particle Accelerator Conference (6th)
Proceedings Link to full IPAC2015 Proccedings
Session Monday Posters (Tyler)
Date 04-May-15   16:00–18:00
Main Classification 6: Beam Instrumentation, Controls, Feedback, and Operational Aspects
Sub Classification T03 - Beam Diagnostics and Instrumentation
Keywords injection, hardware, betatron, FPGA, experiment
Publisher JACoW, Geneva, Switzerland
Editors Stuart Henderson (ANL, Argonne, IL, USA); Evelyn Akers (Jlab, Newport News, VA, USA); Todd Satogata (JLab, Newport News, VA, USA); Volker R.W. Schaa (GSI, Darmstadt, Germany)
ISBN 978-3-95450-168-7
Published June 2015
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